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| Ver1.0 A1 PROs 1 A1 PROs AI1003 Vertical Clock Driver for Camera System Description -. AI1003 is a vertical clock driver with 3 levels of output voltage processed in a standard CMOS Pin Configuration GND 1 16 VP1(+15V) 15 VSUB 14 VSS(-8.5V) 13 V 2 12 V 1 11 VP0(0V) 10 V 3 9 XSUB 2 XV2 3 4 5 6 7 8 Feature -. 3 Levels of output voltage, 15V, 0V, -8.5V -. 3.3V / 5V input voltage XV1 XSG1 XV3 XSG2 XV4 V 4 16 PIN TSSOP ( Top View ) Absolute Maximum Ratings Rating Parameter Symbol Min VSS Supply Voltage VP1 VP0 Input Voltage Output Voltage Operating Ambient Temperature Storage Temperature VI V 1, V 3, VSUB V 2, V Ta Ts 4 Unit Typ Max 0 VSS+30 3 VP1+0.3 VP1+0.3 VP1+0.3 85 125 V V V V V V -10 -0.3 VSS-0.3 -0.3 VSS-0.3 VSS-0.3 -25 -45 NOTE : Stress above those listed under "Absolute Maximum Rating" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for the extended periods of time may affect device reliability. 1 AI1003 VSS(-8.5V) VP1(+15V) Block Diagram VSUB VP0(0V) 2 1 3 V V V 16 15 14 13 12 11 10 1 GND 2 XSUB 3 XV2 4 XV1 5 XSG1 6 XV3 7 XSG2 Logic Truth Table Input XV1, 2 L L H H XSG1, 2 L H L H XV2, 4 XSUB V 1,3 XV4 V 9 8 4 Output V 2,4 VSUB VP1 VP0 *Z VSS L H L H VP0 VSS VP1 VSS * Z is high impedance. Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol GND XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 V4 V 3 I/O I I I I I I I O O O O O GND Description Input signal pin - control VSUB Input signal pin - control V Input signal pin - control V Input signal pin - control V Input signal pin - control V Input signal pin - control V 2 1 1 3 3 VP0 V1 V2 VSS VSUB VP1 Input signal pin - control V 4 Output signal pin - 2 level ( VP0, VSS) Output signal pin - 3 level ( VP1, VP0, VSS) Power supply (0V) Output signal pin - 3 level ( VP1, VP0, VSS) Output signal pin - 2 level ( VP0, VSS) Power supply (-8.5V) Output signal pin - 2 level ( VP1, VSS) Power supply (+15V) 2 AI1003 DC Characteristics (TA=25 , VDD = 5V, VSS = -8.5V, VP0 =GND, VP1 = 15V) Value Parameter Symbol Min Power Supply VP1 VSS IP1 Supply Current ISS IP0 Input Voltage Input Current VIH VIL II IOL IOM1 Output Current IOM2 IOH IOSL IOSH 12 9 -1 24 0 30 -18 13.5 -15 18 -10 -7 -25 -25 2.3 1.2 1 -8 14.5 -9.5 Unit Typ 15 -8.5 2.4 -4.2 0.6 2.5 Condition Max 15.5 -7.5 6 V V mA mA mA V V A mA mA mA mA mA mA VIN=0~5V (*2) V V V V 1~4 1~4 1,3 1,3 (*1) = -8.0V = -0.5V = -0.5V = -0.5V VSUB = -8.0V VSUB = 14.5V (*1) : Refer to the measurement circuit. Shutter speed : 1/40 s (*2) : XV1~4, XSG1,2 , XSUB pins 3 AI1003 Measurement Circuit R1 R2 C1 R1 R1 : 27 R2 : 5 C1 : 1500pF C2 : 3300pF C2 C2 C1 C1 500pF R1 C2 C2 R1 C1 VP1(15V) VSS(- 8.5V) 0V 16 15 14 13 12 11 10 9 AI1003 1 2 3 4 5 6 7 8 Timing Generator 4 AI1003 AC Characteristics (TA=25 , VDD = 5V, VSS = -8.5V, VP0 =GND, VP1 = 15V) Value Parameter Symbol Min TPLM TPMH Delay Time TPLH TPML TPHM TPHL TTLM TTMH Transition Time TTLH TTML TTHM TTHL Output Noise Voltage VCLH, VCLL VCMH, VCML 100 100 110 190 190 150 170 190 100 100 60 90 Unit Typ 140 140 150 250 250 220 250 240 150 200 110 140 Condition Max 190 190 210 310 310 270 330 310 210 310 170 210 0.5 ns ns ns No Load (*1) ns ns ns ns ns ns ns ns ns V VSS VP0 VSS VP0 VP1 VP1 VP0 (*1) VP1 (*1) VP1 (*1) VSS (*1) VP0 (*1) VSS (*1) (*2) (*1) : Refer to Timing Diagram (*2) : Refer to Noise Diagram Noise Diagram VCMH VCML VM VCLH VCLL VL 5 AI1003 Timing Diagram 5V XV1 ~ 4 50% 50% GND XSG1, 2 5V GND TPMH VP1 TPLM TTLM 90% 10% 50% 50% TPHM TTHM TTML 90% 10% 10% TTMH TPML 90% V 1,3 VP0 VSS TPLM VP0 10% TTHL TTLM 90% TPHL 90% V 2,4 VSS 10% 10% 5V XSUB GND 50% 50% TTHL TPLH VP1 TTLH 90% TPHL 90% 10% VSUB VSS 10% 6 AI1003 Application Circuit VP1 (15V) VSS (- 8.5V) 1 T I M I N G G E N E R A T O R GND XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 VP1 VSUB VSS 16 15 14 13 12 11 10 9 0.1 F 1N4148 1F VSUB XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 2 3 4 5 6 7 8 2 3 4 5 6 7 8 A 100K V V 2 1 i 1 0 0 3 V V 2 1 VP0 V V 3 4 C C D V V 3 4 * Warning : When voltage is biased, You must keep this flow. If you don't keep this flow, Negative voltage is applied to CCD image sensor's SUB. 15V (VP1) t1 20% 0V (VP0 ) 20% t2 * t1 t2 10ms - 8.5V (VSS ) 7 AI1003 Package Dimension ( AI1003 : 16 PIN TSSOP ) E E1 e D b y 12 (4X) A2 A1 A L C D NOTE: 1. PACKAGE BODY SIZES EXCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS 2. TOLERANCE 0.1mm UNLESS OTHERWISE SPECIFIED 3. COPLANARITY : 0.1mm 4. CONTROLLOMG DIMENSION IS MILLIMETER. CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT. 5. FOLLOWED FROM JEDEC MO-153 DIMENSIONS IN MILLIMETERS SYMBOLS MIN A A1 A2 b C D E E1 e L y 0.05 0.80 0.19 0.09 4.90 6.20 4.30 0.45 0 NOM 1.00 5.00 6.40 4.40 0.65 0.60 MAX 1.20 0.15 1.05 0.30 0.20 5.10 6.60 4.50 0.75 0.10 8 DIMENSIONS IN INCHES MIN 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.018 0 NOM 0.039 0.197 0.252 0.173 0.026 0.024 MAX 0.048 0.006 0.041 0.012 0.008 0.201 0.260 0.177 0.030 0.004 8 8 |
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